PyDigger - unearthing stuff about Python


NameVersionSummarydate
hdl-registers 5.1.1 An open-source HDL register interface code generator fast enough to run in real time 2024-03-08 11:18:52
tsfpga 12.3.1 A flexible and scalable development platform for modern FPGA projects 2024-03-08 09:33:37
enerbitdso 0.1.8 enerBit DSO (Distribution System Operator) API client 2024-02-27 20:53:18
slvcodec 0.4.18 Utilities for generating VHDL to convert to and from std_logic_vector, as well as utilties to create testbenches described by python. 2024-02-27 18:25:50
magia-flow 0.1.0 Design flow integration and automation with Magia 2024-02-26 21:27:04
anyv-registers 0.1.0 A template-based hardware register bank generator 2024-02-25 13:44:24
lctime 0.0.22 CMOS standard-cell characterization kit. 2024-02-22 10:44:02
magia-hdl 0.5.0 Magia generates Synthesizable SystemVerilog in pythonic syntax 2024-02-20 20:35:45
magia-ip 0.0.1 IP libraries designed with Magia 2024-02-18 21:21:15
myhdl 0.11.45 Python as a Hardware Description Language 2024-02-04 17:47:16
lclayout 0.0.18 CMOS standard-cell layout generator. 2024-01-28 21:50:19
asic 0.2.5 Download and format ASIC files 2024-01-26 03:13:11
syn-magia 0.3.0 Magia generates Synthesizable SystemVerilog in pythonic syntax 2024-01-06 20:57:03
litex 2023.12 Python SoC/Core builder for building FPGA based systems. 2023-12-28 20:49:13
picotalk 0.0.24 Simple voice call tool. 2023-12-15 14:00:45
peakrdl 1.1.0 Command-line tool for control/status register automation and code generation. 2023-10-26 04:34:44
litedram 2023.8 Small footprint and configurable DRAM core 2023-09-17 22:02:31
xeda 0.2.5 Cross EDA Abstraction and Automation 2023-07-26 17:38:36
liteiclink 2022.12 Small footprint and configurable Inter-Chip communication cores 2023-04-11 18:22:04
liteeth 2022.12 Small footprint and configurable Ethernet core 2023-04-11 18:09:25
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