| Name | crc32c JSON |
| Version |
2.7.1.post0
JSON |
| download |
| home_page | None |
| Summary | A python package implementing the crc32c algorithm in hardware and software |
| upload_time | 2025-10-13 02:06:16 |
| maintainer | None |
| docs_url | None |
| author | None |
| requires_python | >=3.7 |
| license | LGPL-2.1-or-later |
| keywords |
|
| VCS |
 |
| bugtrack_url |
|
| requirements |
No requirements were recorded.
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No Travis.
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| coveralls test coverage |
No coveralls.
|
crc32c
======
.. image:: https://github.com/ICRAR/crc32c/workflows/Build%20and%20release%20to%20PyPI/badge.svg?branch=master
.. image:: https://badge.fury.io/py/crc32c.svg
:target: https://badge.fury.io/py/crc32c
This package implements the crc32c checksum algorithm.
It automatically chooses between a hardware-based implementation
(using the CRC32C SSE 4.2 instruction of Intel CPUs,
and the crc32* instructions on ARMv8 CPUs),
or a software-based one when no hardware support can be found.
Because ``crc32c`` is in PyPI, you can install it with::
pip install crc32c
Supported platforms are Linux and OSX using the gcc and clang compilers,
and Windows using the Visual Studio compiler. Other compilers in
Windows (MinGW for instance) might work.
Binary wheels are also provided in PyPI for major platforms/architectures.
The project is using certain gcc/clang compiler extensions to support
building hardware-specific functions that might not be supported
by older compiler versions.
Usage
-----
The core function exposed by this module is ``crc32c(data, value=0, gil_release_mode=-1)``.
It computes the CRC32C checksum of ``data``
starting with an initial ``value`` checksum,
similarly to how the built-in ``binascii.crc32`` works.
It can thus be used like this:
.. code-block:: python
print(crc32c.crc32c(b'hello world'))
# 3381945770
crc = crc32c.crc32c(b'hello')
print(crc32c.crc32c(b' world', value=crc))
# 3381945770
In older versions,
the function exposed by this module was called ``crc32``.
That name is still present but deprecated,
and will be removed in new versions of the library.
The ``gil_release_mode`` keyword argument
specifies whether a call of this library shall release or keep the Global Interpreter Lock.
It can be set to the following values:
* Negative: Only release the GIL when ``data`` >= 32KiB
* 0: Never release the GIL
* Positive: Always release the GIL
The ``gil_release_mode`` parameter
doesn't have any effect on free-threaded Python builds.
On top of the ``crc32c`` function,
a ``CRC32CHash(data=b"", gil_release_mode=-1)`` class is also offered.
It is modelled after the "hash objects" of the ``hashlib`` module
of the standard library. It also offers a ``checksum`` property:
.. code-block:: python
crc32c_hash = crc32c.CRC32CHash()
crc32c_hash.update(b'hello')
crc32c_hash.update(b' world')
print(crc32c_hash.checksum == crc32c.crc32c(b'hello world'))
# True
print(crc32c_hash.digest())
# b'\xc9\x94e\xaa'
digest_as_int = int.from_bytes(crc32c_hash.digest(), "big")
print(digest_as_int == crc32c.crc32c(b'hello world'))
# True
For more details see
the documentation on `hash objects <https://docs.python.org/3/library/hashlib.html#hash-objects>`_.
Additionally one can consult
the following module-level values:
* ``hardware_based`` indicates if the algorithm in use
is software- or hardware-based.
* ``big_endian`` indicates whether the platform is big endian or not.
A benchmarking utility can be found
when executing the ``crc32c.benchmark`` module.
Consult its help with the ``-h`` flag for options.
Implementation details
----------------------
By default,
if your CPU doesn't have CRC32C hardware support,
the package will fallback to use a software implementation
of the crc32c checksum algorithm.
This behavior can be changed by setting
the ``CRC32C_SW_MODE`` environment variable
to one of the following values:
* ``auto``: same as if unset, will eventually be discontinued.
* ``force``: use software implementation regardless of hardware support.
* ``none``: issue a ``RuntimeWarning`` when importing the module,
and a ``RuntimeError`` when executing the ``crc32c`` function,
if no hardware support is found.
In versions of this package up to 2.6
an ``ImportError`` was raised when importing the module instead.
In 1.x versions this was the default behaviour.
Setting the ``CRC32C_SKIP_HW_PROBE`` to ``1``
simulates platforms without hardware support.
This is available mostly for internal testing purposes.
The software algorithm is based
on Intel's `slice-by-8 package <https://sourceforge.net/projects/slicing-by-8/>`_,
with some adaptations done
by `Evan Jones <https://www.evanjones.ca/crc32c.html>`_
and packaging provided by `Ferry Toth <https://github.com/htot/crc32c>`_.
Further adaptations were required
to make the code more portable
and fit for inclusion within this python package.
The Intel SSE 4.2 algorithm
is based on `Mark Adler's code <http://stackoverflow.com/questions/17645167/implementing-sse-4-2s-crc32c-in-software/17646775>`_,
with some modifications required
to make the code more portable
and fit for inclusion within this python package.
The ARMv8 hardware implementation
is based on Google's `crc32c <https://github.com/google/crc32c>`_
C++ library.
Copyright
---------
This package is copyrighted::
ICRAR - International Centre for Radio Astronomy Research
(c) UWA - The University of Western Australia, 2017
Copyright by UWA (in the framework of the ICRAR)
The original slice-by-8 software algorithm
is copyrighted by::
Copyright (c) 2004-2006 Intel Corporation - All Rights Reserved
Further adaptations to the slice-by-8 algorithm
previous to the inclusion in this package
are copyrighted by::
Copyright 2008,2009,2010 Massachusetts Institute of Technology.
The original Intel SSE 4.2 crc32c algorithm
is copyrighted by::
Copyright (C) 2013 Mark Adler
The crc32c ARMv8 hardware code
is copyrighted by::
Copyright 2017 The CRC32C Authors
A copy of the `AUTHORS <AUTHORS.google-crc32c>`_ file
from Google's crc32c project
as it was at the time of copying the code
is included in this repository.
License
-------
This package is licensed under `the LGPL-2.1 license <LICENSE>`_.
The original slice-by-8 software algorithm
is licensed under `the 2-clause BSD licence
<https://opensource.org/licenses/bsd-license.html>`_.
Further modifications to the slice-by-8 software algorithm
are licensed under `a 3-clause BSD licence <LICENSE.slice-by-8>`_
The original Intel SSE 4.2 crc32c algorithm's code
is licensed under a custom license
embedded in the ``crc32c_adler.c`` file.
The original crc32c ARMv8 hardware code
is licensed under `a 3-clause BSD license <LICENSE.google-crc32c>`_.
Raw data
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Other compilers in\nWindows (MinGW for instance) might work.\nBinary wheels are also provided in PyPI for major platforms/architectures.\n\nThe project is using certain gcc/clang compiler extensions to support\nbuilding hardware-specific functions that might not be supported\nby older compiler versions.\n\n\nUsage\n-----\n\nThe core function exposed by this module is ``crc32c(data, value=0, gil_release_mode=-1)``.\nIt computes the CRC32C checksum of ``data``\nstarting with an initial ``value`` checksum,\nsimilarly to how the built-in ``binascii.crc32`` works.\nIt can thus be used like this:\n\n.. code-block:: python\n\n print(crc32c.crc32c(b'hello world'))\n # 3381945770\n crc = crc32c.crc32c(b'hello')\n print(crc32c.crc32c(b' world', value=crc))\n # 3381945770\n\nIn older versions,\nthe function exposed by this module was called ``crc32``.\nThat name is still present but deprecated,\nand will be removed in new versions of the library.\n\nThe ``gil_release_mode`` keyword argument\nspecifies whether a call of this library shall release or keep the Global Interpreter Lock.\nIt can be set to the following values:\n\n* Negative: Only release the GIL when ``data`` >= 32KiB\n* 0: Never release the GIL\n* Positive: Always release the GIL\n\nThe ``gil_release_mode`` parameter\ndoesn't have any effect on free-threaded Python builds.\n\nOn top of the ``crc32c`` function,\na ``CRC32CHash(data=b\"\", gil_release_mode=-1)`` class is also offered.\nIt is modelled after the \"hash objects\" of the ``hashlib`` module\nof the standard library. It also offers a ``checksum`` property:\n\n.. code-block:: python\n\n crc32c_hash = crc32c.CRC32CHash()\n crc32c_hash.update(b'hello')\n crc32c_hash.update(b' world')\n print(crc32c_hash.checksum == crc32c.crc32c(b'hello world'))\n # True\n print(crc32c_hash.digest())\n # b'\\xc9\\x94e\\xaa'\n digest_as_int = int.from_bytes(crc32c_hash.digest(), \"big\")\n print(digest_as_int == crc32c.crc32c(b'hello world'))\n # True\n\nFor more details see\nthe documentation on `hash objects <https://docs.python.org/3/library/hashlib.html#hash-objects>`_.\n\nAdditionally one can consult\nthe following module-level values:\n\n * ``hardware_based`` indicates if the algorithm in use\n is software- or hardware-based.\n * ``big_endian`` indicates whether the platform is big endian or not.\n\nA benchmarking utility can be found\nwhen executing the ``crc32c.benchmark`` module.\nConsult its help with the ``-h`` flag for options.\n\nImplementation details\n----------------------\n\nBy default,\nif your CPU doesn't have CRC32C hardware support,\nthe package will fallback to use a software implementation\nof the crc32c checksum algorithm.\nThis behavior can be changed by setting\nthe ``CRC32C_SW_MODE`` environment variable\nto one of the following values:\n\n* ``auto``: same as if unset, will eventually be discontinued.\n* ``force``: use software implementation regardless of hardware support.\n* ``none``: issue a ``RuntimeWarning`` when importing the module,\n and a ``RuntimeError`` when executing the ``crc32c`` function,\n if no hardware support is found.\n In versions of this package up to 2.6\n an ``ImportError`` was raised when importing the module instead.\n In 1.x versions this was the default behaviour.\n\nSetting the ``CRC32C_SKIP_HW_PROBE`` to ``1``\nsimulates platforms without hardware support.\nThis is available mostly for internal testing purposes.\n\nThe software algorithm is based\non Intel's `slice-by-8 package <https://sourceforge.net/projects/slicing-by-8/>`_,\nwith some adaptations done\nby `Evan Jones <https://www.evanjones.ca/crc32c.html>`_\nand packaging provided by `Ferry Toth <https://github.com/htot/crc32c>`_.\nFurther adaptations were required\nto make the code more portable\nand fit for inclusion within this python package.\n\nThe Intel SSE 4.2 algorithm\nis based on `Mark Adler's code <http://stackoverflow.com/questions/17645167/implementing-sse-4-2s-crc32c-in-software/17646775>`_,\nwith some modifications required\nto make the code more portable\nand fit for inclusion within this python package.\n\nThe ARMv8 hardware implementation\nis based on Google's `crc32c <https://github.com/google/crc32c>`_\nC++ library.\n\nCopyright\n---------\n\nThis package is copyrighted::\n\n ICRAR - International Centre for Radio Astronomy Research\n (c) UWA - The University of Western Australia, 2017\n Copyright by UWA (in the framework of the ICRAR)\n\nThe original slice-by-8 software algorithm\nis copyrighted by::\n\n Copyright (c) 2004-2006 Intel Corporation - All Rights Reserved\n\nFurther adaptations to the slice-by-8 algorithm\nprevious to the inclusion in this package\nare copyrighted by::\n\n Copyright 2008,2009,2010 Massachusetts Institute of Technology.\n\nThe original Intel SSE 4.2 crc32c algorithm\nis copyrighted by::\n\n Copyright (C) 2013 Mark Adler\n\nThe crc32c ARMv8 hardware code\nis copyrighted by::\n\n Copyright 2017 The CRC32C Authors\n\nA copy of the `AUTHORS <AUTHORS.google-crc32c>`_ file\nfrom Google's crc32c project\nas it was at the time of copying the code\nis included in this repository.\n\nLicense\n-------\n\nThis package is licensed under `the LGPL-2.1 license <LICENSE>`_.\n\nThe original slice-by-8 software algorithm\nis licensed under `the 2-clause BSD licence\n<https://opensource.org/licenses/bsd-license.html>`_.\n\nFurther modifications to the slice-by-8 software algorithm\nare licensed under `a 3-clause BSD licence <LICENSE.slice-by-8>`_\n\nThe original Intel SSE 4.2 crc32c algorithm's code\nis licensed under a custom license\nembedded in the ``crc32c_adler.c`` file.\n\nThe original crc32c ARMv8 hardware code\nis licensed under `a 3-clause BSD license <LICENSE.google-crc32c>`_.\n",
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