nvidia-cusparselt-cu12


Namenvidia-cusparselt-cu12 JSON
Version 0.6.3 PyPI version JSON
download
home_pagehttps://developer.nvidia.com/cusparselt
SummaryNVIDIA cuSPARSELt
upload_time2024-10-15 21:29:17
maintainerNone
docs_urlNone
authorNVIDIA Corporation
requires_pythonNone
licenseNVIDIA Proprietary Software
keywords cuda nvidia machine learning high-performance computing
VCS
bugtrack_url
requirements No requirements were recorded.
Travis-CI No Travis.
coveralls test coverage No coveralls.
            ###################################################################################
cuSPARSELt: A High-Performance CUDA Library for Sparse Matrix-Matrix Multiplication
###################################################################################

**NVIDIA cuSPARSELt** is a high-performance CUDA library dedicated to general matrix-matrix operations in which at least one operand is a sparse matrix:

.. math::

   D = Activation(\alpha op(A) \cdot op(B) + \beta op(C) + bias) \cdot scale

where :math:`op(A)/op(B)` refers to in-place operations such as transpose/non-transpose, and :math:`alpha, beta, scale` are scalars.

The *cuSPARSELt APIs* allow flexibility in the algorithm/operation selection, epilogue, and matrix characteristics, including memory layout, alignment, and data types.

**Download:** `developer.nvidia.com/cusparselt/downloads <https://developer.nvidia.com/cusparselt/downloads>`_

**Provide Feedback:** `Math-Libs-Feedback@nvidia.com <mailto:Math-Libs-Feedback@nvidia.com?subject=cuSPARSELt-Feedback>`_

**Examples**:
`cuSPARSELt Example 1 <https://github.com/NVIDIA/CUDALibrarySamples/tree/master/cuSPARSELt/matmul>`_,
`cuSPARSELt Example 2 <https://github.com/NVIDIA/CUDALibrarySamples/tree/master/cuSPARSELt/matmul_advanced>`_

**Blog post**:

- `Exploiting NVIDIA Ampere Structured Sparsity with cuSPARSELt <https://developer.nvidia.com/blog/exploiting-ampere-structured-sparsity-with-cusparselt/>`_
- `Structured Sparsity in the NVIDIA Ampere Architecture and Applications in Search Engines <https://developer.nvidia.com/blog/structured-sparsity-in-the-nvidia-ampere-architecture-and-applications-in-search-engines/>`__
- `Making the Most of Structured Sparsity in the NVIDIA Ampere Architecture <https://www.nvidia.com/en-us/on-demand/session/gtcspring21-s31552/>`__

================================================================================
Key Features
================================================================================

* *NVIDIA Sparse MMA tensor core* support
* Mixed-precision computation support:

    +--------------+----------------+-----------------+-------------+
    | Input A/B    | Input C        | Output D        | Compute     |
    +==============+================+=================+=============+
    | `FP32`       | `FP32`         | `FP32`          | `FP32`      |
    +--------------+----------------+-----------------+-------------+
    | `FP16`       | `FP16`         | `FP16`          | `FP32`      |
    +              +                +                 +-------------+
    |              |                |                 | `FP16`      |
    +--------------+----------------+-----------------+-------------+
    | `BF16`       | `BF16`         | `BF16`          | `FP32`      |
    +--------------+----------------+-----------------+-------------+
    | `INT8`       | `INT8`         | `INT8`          | `INT32`     |
    +              +----------------+-----------------+             +
    |              | `INT32`        | `INT32`         |             |
    +              +----------------+-----------------+             +
    |              | `FP16`         | `FP16`          |             |
    +              +----------------+-----------------+             +
    |              | `BF16`         | `BF16`          |             |
    +--------------+----------------+-----------------+-------------+
    | `E4M3`       | `FP16`         | `E4M3`          | `FP32`      |
    +              +----------------+-----------------+             +
    |              | `BF16`         | `E4M3`          |             |
    +              +----------------+-----------------+             +
    |              | `FP16`         | `FP16`          |             |
    +              +----------------+-----------------+             +
    |              | `BF16`         | `BF16`          |             |
    +              +----------------+-----------------+             +
    |              | `FP32`         | `FP32`          |             |
    +--------------+----------------+-----------------+-------------+
    | `E5M2`       | `FP16`         | `E5M2`          | `FP32`      |
    +              +----------------+-----------------+             +
    |              | `BF16`         | `E5M2`          |             |
    +              +----------------+-----------------+             +
    |              | `FP16`         | `FP16`          |             |
    +              +----------------+-----------------+             +
    |              | `BF16`         | `BF16`          |             |
    +              +----------------+-----------------+             +
    |              | `FP32`         | `FP32`          |             |
    +--------------+----------------+-----------------+-------------+

* Matrix pruning and compression functionalities
* Activation functions, bias vector, and output scaling
* Batched computation (multiple matrices in a single run)
* GEMM Split-K mode
* Auto-tuning functionality (see `cusparseLtMatmulSearch()`)
* NVTX ranging and Logging functionalities

================================================================================
Support
================================================================================

* *Supported SM Architectures*: `SM 8.0`, `SM 8.6`, `SM 8.9`, `SM 9.0`
* *Supported CPU architectures and operating systems*:

+------------+--------------------+
| OS         | CPU archs          |
+============+====================+
| `Windows`  | `x86_64`           |
+------------+--------------------+
| `Linux`    | `x86_64`, `Arm64`  |
+------------+--------------------+


================================================================================
Documentation
================================================================================

Please refer to https://docs.nvidia.com/cuda/cusparselt/index.html for the cuSPARSELt documentation.

================================================================================
Installation
================================================================================

The cuSPARSELt wheel can be installed as follows:

.. code-block:: bash

   pip install nvidia-cusparselt-cuXX

where XX is the CUDA major version (currently CUDA 12 only is supported).

            

Raw data

            {
    "_id": null,
    "home_page": "https://developer.nvidia.com/cusparselt",
    "name": "nvidia-cusparselt-cu12",
    "maintainer": null,
    "docs_url": null,
    "requires_python": null,
    "maintainer_email": null,
    "keywords": "cuda, nvidia, machine learning, high-performance computing",
    "author": "NVIDIA Corporation",
    "author_email": "cuda_installer@nvidia.com",
    "download_url": null,
    "platform": null,
    "description": "###################################################################################\ncuSPARSELt: A High-Performance CUDA Library for Sparse Matrix-Matrix Multiplication\n###################################################################################\n\n**NVIDIA cuSPARSELt** is a high-performance CUDA library dedicated to general matrix-matrix operations in which at least one operand is a sparse matrix:\n\n.. math::\n\n   D = Activation(\\alpha op(A) \\cdot op(B) + \\beta op(C) + bias) \\cdot scale\n\nwhere :math:`op(A)/op(B)` refers to in-place operations such as transpose/non-transpose, and :math:`alpha, beta, scale` are scalars.\n\nThe *cuSPARSELt APIs* allow flexibility in the algorithm/operation selection, epilogue, and matrix characteristics, including memory layout, alignment, and data types.\n\n**Download:** `developer.nvidia.com/cusparselt/downloads <https://developer.nvidia.com/cusparselt/downloads>`_\n\n**Provide Feedback:** `Math-Libs-Feedback@nvidia.com <mailto:Math-Libs-Feedback@nvidia.com?subject=cuSPARSELt-Feedback>`_\n\n**Examples**:\n`cuSPARSELt Example 1 <https://github.com/NVIDIA/CUDALibrarySamples/tree/master/cuSPARSELt/matmul>`_,\n`cuSPARSELt Example 2 <https://github.com/NVIDIA/CUDALibrarySamples/tree/master/cuSPARSELt/matmul_advanced>`_\n\n**Blog post**:\n\n- `Exploiting NVIDIA Ampere Structured Sparsity with cuSPARSELt <https://developer.nvidia.com/blog/exploiting-ampere-structured-sparsity-with-cusparselt/>`_\n- `Structured Sparsity in the NVIDIA Ampere Architecture and Applications in Search Engines <https://developer.nvidia.com/blog/structured-sparsity-in-the-nvidia-ampere-architecture-and-applications-in-search-engines/>`__\n- `Making the Most of Structured Sparsity in the NVIDIA Ampere Architecture <https://www.nvidia.com/en-us/on-demand/session/gtcspring21-s31552/>`__\n\n================================================================================\nKey Features\n================================================================================\n\n* *NVIDIA Sparse MMA tensor core* support\n* Mixed-precision computation support:\n\n    +--------------+----------------+-----------------+-------------+\n    | Input A/B    | Input C        | Output D        | Compute     |\n    +==============+================+=================+=============+\n    | `FP32`       | `FP32`         | `FP32`          | `FP32`      |\n    +--------------+----------------+-----------------+-------------+\n    | `FP16`       | `FP16`         | `FP16`          | `FP32`      |\n    +              +                +                 +-------------+\n    |              |                |                 | `FP16`      |\n    +--------------+----------------+-----------------+-------------+\n    | `BF16`       | `BF16`         | `BF16`          | `FP32`      |\n    +--------------+----------------+-----------------+-------------+\n    | `INT8`       | `INT8`         | `INT8`          | `INT32`     |\n    +              +----------------+-----------------+             +\n    |              | `INT32`        | `INT32`         |             |\n    +              +----------------+-----------------+             +\n    |              | `FP16`         | `FP16`          |             |\n    +              +----------------+-----------------+             +\n    |              | `BF16`         | `BF16`          |             |\n    +--------------+----------------+-----------------+-------------+\n    | `E4M3`       | `FP16`         | `E4M3`          | `FP32`      |\n    +              +----------------+-----------------+             +\n    |              | `BF16`         | `E4M3`          |             |\n    +              +----------------+-----------------+             +\n    |              | `FP16`         | `FP16`          |             |\n    +              +----------------+-----------------+             +\n    |              | `BF16`         | `BF16`          |             |\n    +              +----------------+-----------------+             +\n    |              | `FP32`         | `FP32`          |             |\n    +--------------+----------------+-----------------+-------------+\n    | `E5M2`       | `FP16`         | `E5M2`          | `FP32`      |\n    +              +----------------+-----------------+             +\n    |              | `BF16`         | `E5M2`          |             |\n    +              +----------------+-----------------+             +\n    |              | `FP16`         | `FP16`          |             |\n    +              +----------------+-----------------+             +\n    |              | `BF16`         | `BF16`          |             |\n    +              +----------------+-----------------+             +\n    |              | `FP32`         | `FP32`          |             |\n    +--------------+----------------+-----------------+-------------+\n\n* Matrix pruning and compression functionalities\n* Activation functions, bias vector, and output scaling\n* Batched computation (multiple matrices in a single run)\n* GEMM Split-K mode\n* Auto-tuning functionality (see `cusparseLtMatmulSearch()`)\n* NVTX ranging and Logging functionalities\n\n================================================================================\nSupport\n================================================================================\n\n* *Supported SM Architectures*: `SM 8.0`, `SM 8.6`, `SM 8.9`, `SM 9.0`\n* *Supported CPU architectures and operating systems*:\n\n+------------+--------------------+\n| OS         | CPU archs          |\n+============+====================+\n| `Windows`  | `x86_64`           |\n+------------+--------------------+\n| `Linux`    | `x86_64`, `Arm64`  |\n+------------+--------------------+\n\n\n================================================================================\nDocumentation\n================================================================================\n\nPlease refer to https://docs.nvidia.com/cuda/cusparselt/index.html for the cuSPARSELt documentation.\n\n================================================================================\nInstallation\n================================================================================\n\nThe cuSPARSELt wheel can be installed as follows:\n\n.. code-block:: bash\n\n   pip install nvidia-cusparselt-cuXX\n\nwhere XX is the CUDA major version (currently CUDA 12 only is supported).\n",
    "bugtrack_url": null,
    "license": "NVIDIA Proprietary Software",
    "summary": "NVIDIA cuSPARSELt",
    "version": "0.6.3",
    "project_urls": {
        "Homepage": "https://developer.nvidia.com/cusparselt"
    },
    "split_keywords": [
        "cuda",
        " nvidia",
        " machine learning",
        " high-performance computing"
    ],
    "urls": [
        {
            "comment_text": "",
            "digests": {
                "blake2b_256": "3b9a72ef35b399b0e183bc2e8f6f558036922d453c4d8237dab26c666a04244b",
                "md5": "7f9f32cf1080300ace5f4fe061d2e3dd",
                "sha256": "e5c8a26c36445dd2e6812f1177978a24e2d37cacce7e090f297a688d1ec44f46"
            },
            "downloads": -1,
            "filename": "nvidia_cusparselt_cu12-0.6.3-py3-none-manylinux2014_x86_64.whl",
            "has_sig": false,
            "md5_digest": "7f9f32cf1080300ace5f4fe061d2e3dd",
            "packagetype": "bdist_wheel",
            "python_version": "py3",
            "requires_python": null,
            "size": 156785796,
            "upload_time": "2024-10-15T21:29:17",
            "upload_time_iso_8601": "2024-10-15T21:29:17.709644Z",
            "url": "https://files.pythonhosted.org/packages/3b/9a/72ef35b399b0e183bc2e8f6f558036922d453c4d8237dab26c666a04244b/nvidia_cusparselt_cu12-0.6.3-py3-none-manylinux2014_x86_64.whl",
            "yanked": false,
            "yanked_reason": null
        }
    ],
    "upload_time": "2024-10-15 21:29:17",
    "github": false,
    "gitlab": false,
    "bitbucket": false,
    "codeberg": false,
    "lcname": "nvidia-cusparselt-cu12"
}
        
Elapsed time: 0.36408s