# Torii-HDL
Torii is a fork of [Amaranth HDL](https://github.com/amaranth-lang) that has been modified for use at [Shrine Maiden Heavy Industries](https://shrine-maiden-heavy.industries/). It has merged several of the components that were separate into a single package, and also adds new functionality, as well as some internal changes for better integration into tooling.
The evaluation board definitions have also been migrated and are located in the [torii-boards](https://github.com/shrine-maiden-heavy-industries/torii-boards) repository.
There is also a list of [projects using Torii](https://torii.shmdn.link/projects.html) that are using Torii, and we'd love to add yours too!
## Introduction
Please see the [Torii Introduction](https://shrine-maiden-heavy-industries.github.io/torii-hdl/intro.html) on the [online documentation](https://shrine-maiden-heavy-industries.github.io/torii-hdl/)
## Installation
Please see the [installation instructions](https://shrine-maiden-heavy-industries.github.io/torii-hdl/install.html) on the [online documentation](https://shrine-maiden-heavy-industries.github.io/torii-hdl/)
## Supported devices
Torii can be used to target any FPGA or ASIC process that accepts behavioral Verilog-2001 as input. It also offers extended support for many FPGA families, providing toolchain integration, abstractions for device-specific primitives, and more. Specifically:
<table>
<thead>
<tr>
<th rowspan="3">FPGA</th>
<th colspan="2">Toolchain</th>
</tr>
<tr></tr>
<tr>
<th>Proprietary</th>
<th>FOSS</th>
</tr>
</thead>
<tbody>
<tr>
<td>Lattice iCE40</td>
<td>iCECube2</td>
<td rowspan="4">Yosys+nextpnr</td>
</tr>
<tr></tr>
<tr>
<td>Lattice ECP5</td>
<td rowspan="6">Lattice Diamond</td>
</tr>
<tr></tr>
<tr>
<td>Lattice MachXO3L</td>
<td rowspan="14"></td>
</tr>
<tr></tr>
<tr>
<td>Lattice MachXO2</td>
</tr>
<tr></tr>
<tr>
<td>Xilinx 7-series</td>
<td rowspan="4">Vivado</td>
</tr>
<tr></tr>
<tr>
<td>Xilinx UltraScale</td>
</tr>
<tr></tr>
<tr>
<td>Xilinx Spartan 6</td>
<td rowspan="4">ISE</td>
</tr>
<tr></tr>
<tr>
<td>Xilinx Spartan 3A</td>
</tr>
<tr></tr>
<tr>
<td>Altera/Intel</td>
<td>Quartus</td>
</tr>
<tr></tr>
<tr>
<td>Quicklogic EOS S3</td>
<td></td>
<td>Yosys+VPR</td>
</tr>
</tbody>
</table>
## License
Torii is released under the [BSD-2-Clause](https://spdx.org/licenses/BSD-2-Clause.html), the full text of which can be found in the [LICENSE](LICENSE) file.
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"description": "# Torii-HDL\n\nTorii is a fork of [Amaranth HDL](https://github.com/amaranth-lang) that has been modified for use at [Shrine Maiden Heavy Industries](https://shrine-maiden-heavy.industries/). It has merged several of the components that were separate into a single package, and also adds new functionality, as well as some internal changes for better integration into tooling.\n\nThe evaluation board definitions have also been migrated and are located in the [torii-boards](https://github.com/shrine-maiden-heavy-industries/torii-boards) repository.\n\n\nThere is also a list of [projects using Torii](https://torii.shmdn.link/projects.html) that are using Torii, and we'd love to add yours too!\n\n\n## Introduction\n\nPlease see the [Torii Introduction](https://shrine-maiden-heavy-industries.github.io/torii-hdl/intro.html) on the [online documentation](https://shrine-maiden-heavy-industries.github.io/torii-hdl/)\n\n\n## Installation\n\nPlease see the [installation instructions](https://shrine-maiden-heavy-industries.github.io/torii-hdl/install.html) on the [online documentation](https://shrine-maiden-heavy-industries.github.io/torii-hdl/)\n\n## Supported devices\n\nTorii can be used to target any FPGA or ASIC process that accepts behavioral Verilog-2001 as input. It also offers extended support for many FPGA families, providing toolchain integration, abstractions for device-specific primitives, and more. Specifically:\n\n<table>\n <thead>\n <tr>\n <th rowspan=\"3\">FPGA</th>\n <th colspan=\"2\">Toolchain</th>\n </tr>\n <tr></tr>\n <tr>\n <th>Proprietary</th>\n <th>FOSS</th>\n </tr>\n </thead>\n <tbody>\n <tr>\n <td>Lattice iCE40</td>\n <td>iCECube2</td>\n <td rowspan=\"4\">Yosys+nextpnr</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Lattice ECP5</td>\n <td rowspan=\"6\">Lattice Diamond</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Lattice MachXO3L</td>\n <td rowspan=\"14\"></td>\n </tr>\n <tr></tr>\n <tr>\n <td>Lattice MachXO2</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Xilinx 7-series</td>\n <td rowspan=\"4\">Vivado</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Xilinx UltraScale</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Xilinx Spartan 6</td>\n <td rowspan=\"4\">ISE</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Xilinx Spartan 3A</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Altera/Intel</td>\n <td>Quartus</td>\n </tr>\n <tr></tr>\n <tr>\n <td>Quicklogic EOS S3</td>\n <td></td>\n <td>Yosys+VPR</td>\n </tr>\n </tbody>\n</table>\n\n## License\n\nTorii is released under the [BSD-2-Clause](https://spdx.org/licenses/BSD-2-Clause.html), the full text of which can be found in the [LICENSE](LICENSE) file.\n",
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