| Name | Version | Summary | date |
| litexcnc |
1.3.1 |
Generic CNC firmware and driver for FPGA cards which are supported by LiteX |
2025-01-10 10:02:59 |
| myhdl |
0.11.51 |
Python as a Hardware Description Language |
2024-12-21 16:28:31 |
| liteiclink |
2023.12 |
Small footprint and configurable Inter-Chip communication cores |
2024-04-18 20:33:04 |
| anyv-registers |
0.1.0 |
A template-based hardware register bank generator |
2024-02-25 13:44:24 |
| magia-hdl |
0.5.0 |
Magia generates Synthesizable SystemVerilog in pythonic syntax |
2024-02-20 20:35:45 |
| magia-ip |
0.0.1 |
IP libraries designed with Magia |
2024-02-18 21:21:15 |
| smartmca |
0.0.4 |
Smart MCA for DT5771 Python Library |
2024-02-12 14:24:18 |
| fxpmath |
0.4.9 |
A python library for fractional fixed-point (base 2) arithmetic and binary manipulation with Numpy compatibility. |
2024-02-08 01:34:31 |
| syn-magia |
0.3.0 |
Magia generates Synthesizable SystemVerilog in pythonic syntax |
2024-01-06 20:57:03 |
| desyrdl |
1.3.0 |
DesyRDL - Tool for address space and register generation |
2024-01-04 09:37:54 |
| litex |
2023.12 |
Python SoC/Core builder for building FPGA based systems. |
2023-12-28 20:49:13 |
| esp32ecp5 |
1.0.26 |
MicroPython ESP32 JTAG programmer for ECP5 FPGA |
2023-10-22 10:06:04 |
| crcgen |
2.6 |
CRC algorithm HDL code generator (VHDL, Verilog, MyHDL) |
2023-10-13 20:56:15 |
| sphinxcontrib-hdl-diagrams |
0.0.post160 |
Generate diagrams from HDL in Sphinx. |
2023-09-21 05:39:48 |
| litedram |
2023.8 |
Small footprint and configurable DRAM core |
2023-09-17 22:02:31 |
| spydrnet |
1.13.0 |
Python package for analyzing and transforming netlists |
2023-09-14 18:29:05 |
| nngen |
1.3.4 |
A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network |
2023-09-12 03:52:33 |
| teroshdl |
3.0.0 |
It groups python dependencies for TerosHDL. |
2023-09-09 10:47:57 |
| aide-core |
1.0.1000 |
A professional collaborative platform for embedded development. Cross-platform IDE and Unified Debugger. Static Code Analyzer and Remote Unit Testing. Multi-platform and Multi-architecture Build System. Firmware File Explorer and Memory Inspection. IoT, Arduino, CMSIS, ESP-IDF, FreeRTOS, libOpenCM3, mbedOS, Pulp OS, SPL, STM32Cube, Zephyr RTOS, ARM, AVR, Espressif (ESP8266/ESP32), FPGA, MCS-51 (8051), MSP430, Nordic (nRF51/nRF52), NXP i.MX RT, PIC32, RISC-V, STMicroelectronics (STM8/STM32), Teensy |
2023-08-29 14:17:47 |
| xeda |
0.2.5 |
Cross EDA Abstraction and Automation |
2023-07-26 17:38:36 |