PyDigger - unearthing stuff about Python


NameVersionSummarydate
fsva 0.0.7 fsva (FuseSoc Verification Automation) 2021-01-15 12:02:44
axilent 0.1.8 Tools for describing a sequence of Axi4Lite commands. 2021-01-14 17:43:30
slvcodec 0.4.10 Utilities for generating VHDL to convert to and from std_logic_vector, as well as utilties to create testbenches described by python. 2021-01-14 17:39:17
hdlConvertorAst 0.6 A library of AST nodes for HDL languages (Verilog, VHDL, ...) and transpiler/compiler utilities 2020-11-01 23:19:34
sphinxcontrib-hdl-diagrams 0.0.post131 Generate diagrams from HDL in Sphinx. 2020-09-22 16:33:00
hdlConvertor 2.1 VHDL and System Verilog parser written in c++ 2020-09-06 20:54:36
pygears 0.2.0 Framework for functional hardware design approach 2020-07-17 10:54:09
myhdl 0.10 Python as a Hardware Description Language 2018-04-02 09:03:37
chipy 0.1.1 Chipy is a single-file python module for generating digital hardware. 2018-03-31 12:41:20
hdmi2usb.modeswitch 0.0.1 Module and command line tool for control the mode of HDMI2USB devices. 2018-01-14 06:18:34
pycircuit 0.0.2 Library for composing circuits and pcb layouts 2017-12-26 20:26:11
polyphony 0.3.3 Python based High Level Synthesis compiler 2017-12-26 02:31:01
symbolator 1.0.2 HDL symbol generator 2017-10-19 03:51:30
hdlparse 1.0.4 HDL parser 2017-10-19 03:50:25
HdlLib 0.1.1 VHDL source management : parse, organize, assemble, generate testbenches 2017-07-10 14:41:42
ipyxact 0.2.3 Python IP-Xact handling library 2016-08-08 20:05:37
pyhdl 0.3.0 A simpe HDL for learning hardware design. 2016-06-03 11:01:46
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